Unified compact model for gate all around fets-nanosheets, nanowires, multi bridge channel MOSFETs

P. Kushwaha, J. P. Duarte, Y. K. Lin, H. Agarwal, H. L. Chang, A. Sachid, Y. S. Chauhan, S. Salahuddin, Chen-Ming Hu

研究成果: Conference contribution同行評審

摘要

A unified compact model for gate-all-around (GAA) FETs is discussed. This single unified model can accurately model different shapes of GAA FETs. In this work, we present its validation with the reported GAA FETs: stacked GAA nanosheet, stacked nanowire MOS-FETs, Multi-bridge-channel MOSFETs and Twin silicon nanowire MOSFETs. This study shows that the BSIM-CMG unified multi-gate MOSFET model is ready for production design of silicon GAA based circuits and technology-product co-development for future technology nodes.

原文English
主出版物標題TechConnect Briefs 2018 - Informatics, Electronics and Microsystems
編輯Matthew Laudon, Fiona Case, Bart Romanowicz, Fiona Case
發行者TechConnect
頁面249-252
頁數4
ISBN(電子)9780998878256
出版狀態Published - 1 一月 2018
事件11th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 20th Annual Nanotech Conference and Expo,the 2018 SBIR/STTR Spring Innovation Conference, and the Defense TechConnect DTC Spring Conference - Anaheim, United States
持續時間: 13 五月 201816 五月 2018

出版系列

名字TechConnect Briefs 2018 - Advanced Materials
4

Conference

Conference11th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 20th Annual Nanotech Conference and Expo,the 2018 SBIR/STTR Spring Innovation Conference, and the Defense TechConnect DTC Spring Conference
國家United States
城市Anaheim
期間13/05/1816/05/18

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