Translating AArch64 floating-point instruction set to the x86-64 platform

Yi-Ping You, Tsung Chun Lin, Wuu Yang

研究成果: Conference contribution同行評審

摘要

Binary translation translates binary programs from one instruction set to another. It is widely used in virtual machines and emulators. We extend mc2llvm, which is an LLVM-based retargetable 32-bit binary translator developed in our lab in the past several years, to support 64-bit ARM instruction set. In this paper, we report the translation of AArch64 floating-point instructions in our mc2llvm. For floating-point instructions, due to the lack of floating-point support in LLVM [13, 14], we add support for the flush-to-zero mode, not-a-number processing, floating-point exceptions, and various rounding modes. On average, mc2llvm-translated binary can achieve 47% and 24.5% of the performance of natively compiled x86-64 binary on statically translated EEMBC benchmark and dynamically translated SPEC CINT2006 benchmarks, respectively. Compared to QEMU-translated binary, mc2llvm-translated binary runs 2.92x, 1.21x and 1.41x faster on statically translated EEMBC benchmark, dynamically translated SPEC CINT2006, and CFP2006 benchmarks, respectively. (Note that the benchmarks contain both floating-point instructions and other instructions, such as load and store instructions).

原文English
主出版物標題48th International Conference on Parallel Processing, ICPP 2019 - Workshop Proceedings
發行者Association for Computing Machinery
頁面1-7
頁數7
ISBN(電子)9781450371964
DOIs
出版狀態Published - 八月 2019
事件48th International Conference on Parallel Processing, ICPP 2019 - Kyoto, Japan
持續時間: 5 八月 20198 八月 2019

出版系列

名字ACM International Conference Proceeding Series

Conference

Conference48th International Conference on Parallel Processing, ICPP 2019
國家Japan
城市Kyoto
期間5/08/198/08/19

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