In this paper, the variability issues of small scale CMOS devices made by the advanced strained technology will be presented. Two major sources of the variability are discussed, RDF (Random Dopant Fluctuation) and RTF (Random Trap Fluctuation). The former is induced by the process, while the later is induced by the devices after the electrical stress. For process-induced Vth variation, the major source of variability for conventional CMOS devices comes from the random dopant fluctuation (RDF) in the device channel, but it is more complex for the strained devices due to the interaction between dopants and stressors. An experimental discrete dopant profiling technique has therefore been developed which is helpful for the understanding of various strain effect, the carbon-outdiffusion, and the Ge out-diffusion in the strained devices. For stress-induced Vth variation, the RTF has been introduced. In general, strain devices exhibit a better RDF induced variation in comparison to the conventional devices. However, they may have poorer RTF for devices after the stress. By a suitable design or optimization of the device process/structure, the RTF effect can be suppressed. These results will be useful for the design of strained CMOS devices in terms of high performance, acceptable reliability, and suppressed variability.