The understanding of breakdown path in both high-k metal-gate CMOS and resistance RAM by the RTN measurement

Steve S. Chung*

*Corresponding author for this work

研究成果: Conference contribution

摘要

The breakdown path which leads to the soft-and hard-breakdown in a MOSFET device can be identified from the experiment. It carries similar concept of the filament formation in RRAM device. Basically, RTN traps in the dielectric layers can be labeled as a pointer to trace the breakdown path, i.e., from the leakage by measuring the transistor's Ig current as a function of time. In CMOS, these traps can be considered as the leakage path in the gate dielectrics which eventually cause the final hard-breakdown. In RRAM device, these traps are closely related to the soft-breakdown which is the key element of filament formation. The RTN analysis can also be utilized to examine the influences of RTN traps on the SBD paths. The instability of the switching resistance, caused by the traps will be illustrated.

原文English
主出版物標題2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
編輯Ru Huang, Ting-Ao Tang, Yu-Long Jiang
發行者Institute of Electrical and Electronics Engineers Inc.
頁面428-431
頁數4
ISBN(電子)9781467397179
DOIs
出版狀態Published - 31 七月 2017
事件13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Hangzhou, China
持續時間: 25 十月 201628 十月 2016

出版系列

名字2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings

Conference

Conference13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016
國家China
城市Hangzhou
期間25/10/1628/10/16

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