This paper presents a methodology to investigate the dopant fluctuation and the gate leakage fluctuation of trigate devices via a purely experimental approach. The dopant fluctuation is known to be reduced in a trigate comparing to a planar transistor, while it depends on the Fin-height. Another source of variation is the gate leakage variation caused by the surface roughness effect. Both types of variation create major challenges for putting the trigate into the manufacturing. The method to understand these effects and the experimental procedures will be addressed. A measure of the variation by the Pelgrom plot will be specifically addressed.