The issues on the power consumption of Trigate FinFET: The design and manufacturing guidelines

Steve S. Chung, E. R. Hsieh

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

A theory has been developed for geometric variation of trigate FinFETs. This geometric variation includes both line roughness induced variation and oxide-thickness variation, which can be measured from gate capacitance and Ig current variations, respectively. Experimental results show that trigate devices are subject to serious line variations as the fin height scales up and the fin-width scales down, leading to large Ion current variation, i.e., as we increase the fin aspect-ratio, line variation becomes worse which shows an increase of the active power consumption. On the other hand, oxide-thickness variation reveals significant impacts on the off-state leakage, i.e., a rough gate oxide yields to larger static power. These valuable results provide us important guideline for the design and manufacturing of high quality 3D gate FinFETs.

原文English
主出版物標題24th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2017
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1-4
頁數4
ISBN(電子)9781538617793
DOIs
出版狀態Published - 5 十月 2017
事件24th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2017 - Chengdu, China
持續時間: 4 七月 20177 七月 2017

出版系列

名字Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA
2017-July

Conference

Conference24th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2017
國家China
城市Chengdu
期間4/07/177/07/17

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