The Impact of Rate Control Algorithms on System-Level VLSI Design

Sheu Chih Cheng*, Hsueh-Ming Hang

*Corresponding author for this work

研究成果: Article同行評審

摘要

This paper presents an evaluation of rate control algorithms from a system-level VLSI design viewpoint. Rate control in video coding has a significant influence on the coded bit rate and image quality. Many rate control algorithms have been proposed mainly focusing on the optimal rate-distortion performance without considering their performance on the VLSI implementation. The purpose of this study is not to propose a hardware architecture for any specific algorithm but to study the algorithm impact on hardware design. Based on our finding, a system designer should choose an algorithm not only good in rate control performance but also good in hardware implementation. When implementing and comparing a few rate control algorithms using a generic processor structure, we found that, in addition to the ordinary computational complexity, the internal buffer size is also very critical in VLSI realization. Several picture sequences have been tested including one sequence constructed specifically to simulate a difficult case for rate control. In this paper, three different types of popular rate control algorithms have been analyzed based on their picture quality, the internal buffer size, and the hardware cost. The methodology and results presented here provide useful guidelines for selecting an appropriate rate control algorithm for system-level VLSI designers.

原文English
頁(從 - 到)233-250
頁數18
期刊Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology
20
發行號3
DOIs
出版狀態Published - 1 十二月 1998

指紋 深入研究「The Impact of Rate Control Algorithms on System-Level VLSI Design」主題。共同形成了獨特的指紋。

引用此