The effect of IrO2-IrO2- Hf-LaAlO3 gate dielectric on the bias-temperature instability of 3-D GOI CMOSFETs

D. S. Yu*, C. C. Liao, C. F. Cheng, Albert Chin, M. F. Li, S. P. McAlister

*Corresponding author for this work

研究成果: Article同行評審

4 引文 斯高帕斯(Scopus)


We have studied the bias-temperature instability of three-dimensional self-aligned metal-gate/high-Κ/Germanium-on-insulator (GOI) CMOSFETs, which were integrated on underlying 0.18 μm CMOSFETs. The devices used IrO2-IrO2-Hf dual gates and a high-Κ LaAiO3 gate dielectric, and gave an equivalent-oxide thickness (EOT) of 1.4 mn. The metal-gate/high-Κ/GOI p-and n-MOSFETs displayed threshold voltage (Vt) shifts of 30 and 21 mV after 10 MV/cm, 85 °C stress for 1 h, comparable with values for the control two-dimensional (2-D) metal-gate/high-Κ-Si CMOSFETs. An extrapolated maximum voltage of - 1.2 and 1.4 V for a ten-year lifetime was obtained from the bias-temperature stress measurements on the GOI CMOSFETs.

頁(從 - 到)407-409
期刊IEEE Electron Device Letters
出版狀態Published - 1 六月 2005

指紋 深入研究「The effect of IrO<sub>2</sub>-IrO<sub>2</sub>- Hf-LaAlO<sub>3</sub> gate dielectric on the bias-temperature instability of 3-D GOI CMOSFETs」主題。共同形成了獨特的指紋。