Simulation of P- and N-MOSFET hot-carrier degradation in CMOS circuits

P. M. Lee, T. Garfinkel, P. K. Ko, Chen-Ming Hu

研究成果: Conference contribution

7 引文 斯高帕斯(Scopus)

摘要

A PMOSFET hot-carrier degradation model has been incorporated into the reliability simulator BERT-CAS, enabling prediction of dynamic circuit-level degradation in which both PMOSFET and NMOSFET degradation play a major role. Comparisons are presented which reveal the good fit obtained between measurement and simulation results.

原文English
主出版物標題1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers, VTSA 1991
發行者Institute of Electrical and Electronics Engineers Inc.
頁面191-195
頁數5
ISBN(電子)078030036X, 9780780300361
DOIs
出版狀態Published - 1 一月 1991
事件1991 International Symposium on VLSI Technology, Systems, and Applications, VTSA 1991 - Taipei, Taiwan
持續時間: 22 五月 199124 五月 1991

出版系列

名字International Symposium on VLSI Technology, Systems, and Applications, Proceedings
ISSN(列印)1930-8868

Conference

Conference1991 International Symposium on VLSI Technology, Systems, and Applications, VTSA 1991
國家Taiwan
城市Taipei
期間22/05/9124/05/91

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  • 引用此

    Lee, P. M., Garfinkel, T., Ko, P. K., & Hu, C-M. (1991). Simulation of P- and N-MOSFET hot-carrier degradation in CMOS circuits. 於 1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers, VTSA 1991 (頁 191-195). [246684] (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VTSA.1991.246684