TY - GEN
T1 - Si nanowire technology
AU - Iwai, Hiroshi
PY - 2012
Y1 - 2012
N2 - Recently, CMOS downsizing has been accelerated very aggressively in both production and research levels. However, it is still questionable if we can successfully introduce deep sub-10 nm CMOS LSIs into market, due to performance concerns - such as Ion/Ioff ratio, current drive, variation in the electrical characteristics, concerns for the yield, reliability and manufacturing cost. We have conducted nano-CMOS studies in advance to provide possible solutions to the future expected problems. Si Nanowire FETs have been found to have very promising characteristics with high Ion/Ioff ratio and high drive current which could give them a strong foothold in the near future device structures.
AB - Recently, CMOS downsizing has been accelerated very aggressively in both production and research levels. However, it is still questionable if we can successfully introduce deep sub-10 nm CMOS LSIs into market, due to performance concerns - such as Ion/Ioff ratio, current drive, variation in the electrical characteristics, concerns for the yield, reliability and manufacturing cost. We have conducted nano-CMOS studies in advance to provide possible solutions to the future expected problems. Si Nanowire FETs have been found to have very promising characteristics with high Ion/Ioff ratio and high drive current which could give them a strong foothold in the near future device structures.
UR - http://www.scopus.com/inward/record.url?scp=84885695553&partnerID=8YFLogxK
U2 - 10.1149/05004.0251ecst
DO - 10.1149/05004.0251ecst
M3 - Conference contribution
AN - SCOPUS:84885695553
SN - 9781607683520
T3 - ECS Transactions
SP - 251
EP - 260
BT - Dielectric Materials and Metals for Nanoelectronics and Photonics 10
Y2 - 7 October 2012 through 12 October 2012
ER -