Self-Reset Transient Detection Circuit for On-Chip Protection Against System-Level Electrical-Transient Disturbance

Xiao Rui Kang, Ming-Dou Ker*

*Corresponding author for this work

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

A new self-reset transient detection circuit for on-chip protection against a system-level electrical-transient disturbance is proposed. This circuit is designed to detect the occurrence of system-level electrical-transient disturbance events, and automatically reset the system to initial state for the next detection. In addition, the reset time can be adjusted to meet the different requests of system recovery time in microelectronic products. The circuit performance has been investigated by HSPICE simulation and verified in silicon chip. The experiment results in a 0.18- μm complementary metal-oxide semiconductor (CMOS) process with 1.8-V devices have confirmed the detection and self-reset functions of the proposed on-chip self-reset transient detection circuit under system-level electrostatic discharge and electrical-fast-transient testing conditions. With firmware co-design, the proposed detection circuit can provide an effective on-chip solution to recover the microelectronic system from the system-level transient disturbance-induced abnormal state to a known stable state. Therefore, the immunity level of microelectronic products equipped with CMOS integrated circuits against electromagnetic susceptibility can be effectively enhanced.

原文English
頁(從 - 到)114-121
頁數8
期刊IEEE Transactions on Device and Materials Reliability
18
發行號1
DOIs
出版狀態Published - 1 三月 2018

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