Random interface-traps-induced characteristic fluctuation in 16-nm high-/metal gate CMOS device and SRAM circuit

Hui Wen Chen*, Yung Yueh Chiu, Yiming Li

*Corresponding author for this work

研究成果: Conference contribution同行評審

4 引文 斯高帕斯(Scopus)

摘要

In this work, we study the interface traps (ITs) induced electrical characteristic and static noise margin (SNM) fluctuations in 16-nm-gate high-/metal gate complementary metal-oxide-semiconductor devices and static random asccess memory circuit. Totally random generated device samples with 2D ITs at silicon/HfO 2 interface are simulated using an experimentally validated 3D device simulation. Random number and position of ITs and trap's density on fluctuations of threshold voltage, on/off-state current and gate capacitance are explored and compared among process variation effect (PVE), random dopant fluctuation (RDF) and work function fluctuation (WKF). Notably, the position of ITs induces rather different fluctuation in spite of the same number of ITs.

原文English
主出版物標題2011 11th IEEE International Conference on Nanotechnology, NANO 2011
頁面1159-1162
頁數4
DOIs
出版狀態Published - 2011
事件2011 11th IEEE International Conference on Nanotechnology, NANO 2011 - Portland, OR, United States
持續時間: 15 八月 201119 八月 2011

出版系列

名字Proceedings of the IEEE Conference on Nanotechnology
ISSN(列印)1944-9399
ISSN(電子)1944-9380

Conference

Conference2011 11th IEEE International Conference on Nanotechnology, NANO 2011
國家United States
城市Portland, OR
期間15/08/1119/08/11

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