Prospect of tunneling green transistor for 0.1V CMOS

Chen-Ming Hu*, Pratik Patel, Anupama Bowonder, Kanghoon Jeon, Sung Hwan Kim, Wei Yip Loh, Chang Yong Kang, Jungwoo Oh, Prashant Majhi, Ali Javey, Tsu Jae King Liu, Raj Jammy

*Corresponding author for this work

研究成果: Conference contribution同行評審

53 引文 斯高帕斯(Scopus)

摘要

Well designed tunneling green transistor may enable future VLSIs operating at 0.1V. Sub-60mV/decade characteristics have been convincingly demonstrated on 8" wafers. Large ION at low VDD are possible according to TCAD simulations but awaits verification. VDD scaling will greatly benefit from low (effective) band gap energy, which may be provided by type II heterojunctions of Si/Ge or compound semiconductors.

原文English
主出版物標題2010 IEEE International Electron Devices Meeting, IEDM 2010
DOIs
出版狀態Published - 1 十二月 2010
事件2010 IEEE International Electron Devices Meeting, IEDM 2010 - San Francisco, CA, United States
持續時間: 6 十二月 20108 十二月 2010

出版系列

名字Technical Digest - International Electron Devices Meeting, IEDM
ISSN(列印)0163-1918

Conference

Conference2010 IEEE International Electron Devices Meeting, IEDM 2010
國家United States
城市San Francisco, CA
期間6/12/108/12/10

指紋 深入研究「Prospect of tunneling green transistor for 0.1V CMOS」主題。共同形成了獨特的指紋。

引用此