Process integration of composite high-k tunneling dielectric for nanocrystal based carbon nanotube memory

Udayan Ganguly*, Tuo-Hung Hou, Edwin Chihchuan Kan

*Corresponding author for this work

研究成果: Conference contribution同行評審

摘要

Recently, metal nanocrystal (NC) based carbon nanotube (CNT) memory has been demonstrated with sub-5V low bias programming, single electron sensitivity, but poor room-temperature retention. The process integration of an ultra-thin tunnel dielectric is essential for lateral, vertical scaling and reliable room-temperature operations. Low defect density and conformal deposition on the nanotube are required to enhance the performance as a tunnel barrier. Additionally, Au contamination in the CNT decreases the on/off current ratio in the CNTFETs by substantially increasing the off current. Consequently, the dielectric should function as a good diffusion barrier for Au in the nanocrystals. We have explored composite tunneling dielectric film with SiO 2 seed layer for conformal high-k deposition to demonstrate minimal Au contamination and improved retention. Room temperature retention of better than three days has been observed.

原文English
主出版物標題Nanostructured and Patterned Materials for Information Storage
頁面183-188
頁數6
DOIs
出版狀態Published - 1 十二月 2006
事件2006 MRS Fall Meeting - Boston, MA, United States
持續時間: 27 十一月 20061 十二月 2006

出版系列

名字Materials Research Society Symposium Proceedings
961
ISSN(列印)0272-9172

Conference

Conference2006 MRS Fall Meeting
國家United States
城市Boston, MA
期間27/11/061/12/06

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