Power-efficient and cost-effective 2-D symmetry filter architectures

Pei Yu Chen*, Lan-Da Van, I. Hung Khoo, Hari C. Reddy, Chin Teng Lin

*Corresponding author for this work

研究成果: Article同行評審

20 引文 斯高帕斯(Scopus)

摘要

This paper presents two-dimensional (2-D) VLSI digital filter structures possessing various symmetries in the filter magnitude response. For this purpose, four Type-1 and four Type-2 power-efficient and cost-effective 2-D magnitude symmetry filter architectures possessing diagonal, fourfold rotational, quadrantal, and octagonal symmetries with reduced number of multipliers and one power-efficient and cost-effective multimode 2-D symmetry filter are given. By combining the identities of the four Type-1 symmetry filter structures, the proposed multimode 2-D symmetry filter is capable of providing four different operation modes: diagonal symmetry mode (DSM), fourfold rotational symmetry mode (FRSM), quadrantal symmetry mode (QSM), and octagonal symmetry mode (OSM). The proposed diagonal, fourfold rotational, quadrantal, and octagonal symmetry filter structures can attain power savings of 16.77%, 36.30%, 22.90%, and 37.73% with respect to that of the conventional 2-D filter design without symmetry. On the other hand, the proposed DSM, FRSM, QSM, and OSM modes can reduce power consumption by 11.01%, 31.42%, 17.53%, and 35.26% compared with that of the conventional 2-D filter design. The proposed multimode filter can result in a 63.25% area reduction compared with the sum of the areas of the four individual Type-1 symmetry filter structures.

原文English
文章編號5549959
頁(從 - 到)112-125
頁數14
期刊IEEE Transactions on Circuits and Systems I: Regular Papers
58
發行號1
DOIs
出版狀態Published - 1 一月 2011

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