A new approach, called monotone iterative (MI) method, for the numerical solution of semiconductor device equations is presented. This constructive method is intended to alleviate some major difficulties particularly associated with Newton's method that is the principal methodology to date for the solution of nonlinear semiconductor device equations. The method converges globally with arbitrary initial guess under various bias conditions for a submicron MOSFET. By comparing with a Newton's iterative (NI) method, a speed-up factor of 30 in CPU time can be achieved by the MI method. The method is highly parallel and easy to implement for two- and three-dimensional simulations. Numerical simulations on a submicron N-MOSFET device with various biasing conditions and initial guesses are presented to demonstrate the efficiency of the method.
|頁（從 - 到）||27-30|
|期刊||International Symposium on VLSI Technology, Systems, and Applications, Proceedings|
|出版狀態||Published - 1 一月 1999|
|事件||Proceedings of the 1999 International Symposium on VLSI Technology, Systems, and Applications - Taipei, Taiwan|
持續時間: 7 六月 1999 → 10 六月 1999