Modeling short-channel effects of CMOSFET's taking account for channel-engineering, defect-enhanced-diffusion and gate-depletion

Bin Yu*, Wen Chin Lee, Chen-Ming Hu

*Corresponding author for this work

研究成果: Paper同行評審

摘要

The scaling of CMOSFET's is ultimately limited by the short-channel effects such as Vth roll-off and Drain-Induced-Barrier-Lowering (DIBL). In this paper, a unified physical model is presented for short-channel effects in deep-submicron CMOS transistors taking into account the impacts of channel engineering, defect-enhanced diffusion, and polysilicon gate depletion. The model agrees well with experiment data for several CMOS technologies.

原文English
頁面298-302
頁數5
出版狀態Published - 1 一月 1997
事件Proceedings of the 1997 International Symposium on VLSI Technology, Systems, and Applications - Taipei, China
持續時間: 3 六月 19975 六月 1997

Conference

ConferenceProceedings of the 1997 International Symposium on VLSI Technology, Systems, and Applications
城市Taipei, China
期間3/06/975/06/97

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