Microwave and millimeter-wave CMOS frequency doubler and tripler designs

Kun Long Wu*, Han Ting Tsai, Pei Ling Tseng, Shu-I Hu, Christina F. Jou, Yu Shao Shiao

*Corresponding author for this work

研究成果: Conference contribution同行評審

摘要

This manuscript describes our 17.4GHz 0.18μm-CMOS doubler and 77GHz 65nm-CMOS tripler designs. For the doubler, attention has been made on effectively suppressing the fundamental, third and forth harmonics using LLC filtering networks and balun. As for the tripler, the unwanted second-order harmonic can be suppressed through the use of large source impedance on the differential pair while the fundamental signal leakage is removed by an embedded notch filter; therefore, the intended third-harmonic output is almost 40dB larger than all the other spurious signals. The tripler chip size is 700×940um, and it consumes 93mW under 1.2V bias; the 3dB bandwidth for output is 9GHz.

原文English
主出版物標題2014 31th URSI General Assembly and Scientific Symposium, URSI GASS 2014
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781467352253
DOIs
出版狀態Published - 17 十月 2014
事件31st General Assembly and Scientific Symposium of the International Union of Radio Science, URSI GASS 2014 - Beijing, China
持續時間: 16 八月 201423 八月 2014

出版系列

名字2014 31th URSI General Assembly and Scientific Symposium, URSI GASS 2014

Conference

Conference31st General Assembly and Scientific Symposium of the International Union of Radio Science, URSI GASS 2014
國家China
城市Beijing
期間16/08/1423/08/14

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