Correlator is the most demanded block in communication systems. In this paper, low power correlator block is implemented into an embedded DSP core as a special block. This special block of correlator can employ data bus bandwidth of DSP efficiently. The design results show that it use only 3235 gate counts and can reduce the correlation operations from 20 instructions (without correlator) to only 4 instructions.
|出版狀態||Published - 1 十二月 2004|
|事件||2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan|
持續時間: 6 十二月 2004 → 9 十二月 2004
|Conference||2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology|
|期間||6/12/04 → 9/12/04|