Low-capaeitance SCR with waffle layout structure for on-chip ESD protection in RF ICs

Chun Yu Lin*, Ming-Dou Ker

*Corresponding author for this work

研究成果: Conference contribution

11 引文 斯高帕斯(Scopus)

摘要

Silicon-controlled rectifier (SCR) has been used as an effective on-chip ESD protection device in CMOS technology due to the highest ESD robustness. In this work, the waffle layout structure for SCR can achieve smaller parasitic capacitance under the same ESD robustness. With smaller parasitic capacitance, the degradation on RF circuit performance due to ESD protection device can be reduced. The proposed waffle SCR with low parasitic capacitance is suitable for on-chip ESD protection in RF ICs.

原文English
主出版物標題Proceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007
頁面749-752
頁數4
DOIs
出版狀態Published - 2 十月 2007
事件2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007 - Honolulu, HI, United States
持續時間: 3 六月 20075 六月 2007

出版系列

名字Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN(列印)1529-2517

Conference

Conference2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007
國家United States
城市Honolulu, HI
期間3/06/075/06/07

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  • 引用此

    Lin, C. Y., & Ker, M-D. (2007). Low-capaeitance SCR with waffle layout structure for on-chip ESD protection in RF ICs. 於 Proceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007 (頁 749-752). [4266539] (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium). https://doi.org/10.1109/RFIC.2007.380991