Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation

Yu Che Chou, Chung Chun Hsu, Cheng Ting Chun, Chen Han Chou, Ming Li Tsai, Yi He Tsai, Wei Li Lee, Shin Yuan Wang, Guang Li Luo, Chao-Hsin Chien*

*Corresponding author for this work

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

In this work, we investigated the influence of retrograde-well implantation on hetero-structure body-tied germanium (Ge) FinFET [1]. Using structural engineering, the retrograde well was fabricated prior to Ge epitaxy, which could avoid the activated temperature of dopant in Si substrate. With optimizing the implant condition, the p-Ge/n-Si hetero-structure junction exhibited high ION/IOFF ratio and lower junction leakage (4 × 10-3 μA/cm2). Furthermore, we also make a comparison of planar and mesa junction structures, mesa junction exhibited lower junction leakage (6× 10-6 μA/cm2) as compared with the planar one mentioned before, which could be attributed to improvement in peripheral leakage due to dislocation within Ge and Si. Comparing the difference between retrograde-well and implant-free Ge FinFETs, the drain induced barrier lowering (DIBL) was considerably improved by 50 %. Our retrograde-well Ge FinFET exhibited a high ION/IOFF ratio ∼ 8×103 (IS) than the conventional Ge FinFET (ION/IOFF ∼2×103).

原文English
主出版物標題16th International Conference on Nanotechnology - IEEE NANO 2016
發行者Institute of Electrical and Electronics Engineers Inc.
頁面142-144
頁數3
ISBN(電子)9781509039142
DOIs
出版狀態Published - 八月 2016
事件16th IEEE International Conference on Nanotechnology - IEEE NANO 2016 - Sendai, Japan
持續時間: 22 八月 201625 八月 2016

出版系列

名字16th International Conference on Nanotechnology - IEEE NANO 2016

Conference

Conference16th IEEE International Conference on Nanotechnology - IEEE NANO 2016
國家Japan
城市Sendai
期間22/08/1625/08/16

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