Input selection encoding for low power multiplexer tree

Hsiao En Chang*, Juinn-Dar Huang, Chia I. Chen

*Corresponding author for this work

研究成果: Conference contribution同行評審

8 引文 斯高帕斯(Scopus)

摘要

With the advent of portable devices, power consumption becomes one of the most important considerations in VLSI designs. Multiplexer (MUX) is a basic component massively used in typical VLSI designs. In this paper, we focus on the minimization of switching activities in a MUX tree composed of 2-to-1 MUXes. The key contribution of this paper is: Given the on probabilities and the selection probabilities of input data signals, the proposed heuristic algorithm can properly encode all input data signals such that the power consumption of the resultant MUX tree is minimized. For a 64-to-1 MUX, the experimental results show that a MUX tree encoded by the proposed algorithm consumes 24% less power than a randomly-encoded tree on average.

原文English
主出版物標題2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers
DOIs
出版狀態Published - 28 九月 2007
事件2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Hsinchu, Taiwan
持續時間: 25 四月 200727 四月 2007

出版系列

名字2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers

Conference

Conference2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007
國家Taiwan
城市Hsinchu
期間25/04/0727/04/07

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