Impacts of NBTI and PBTI on power-gated SRAM with high-k metal-gate devices

Hao I. Yang*, Ching Te Chuang, Wei Hwang

*Corresponding author for this work

研究成果: Conference contribution

6 引文 斯高帕斯(Scopus)

摘要

The threshold voltage (VT) drift induced by Negative Bias Temperature Instability (NBTI) weakens PFETs, while Positive Bias Temperature Instability (PBTI) weakens NFETs fabricated with high-k metal-gate, respectively. These long-term VT drifts degrade SRAM cell stability, margin and performance, and may lead to functional failure over the life of usage. Additionally, most state-of-the-art SRAMs are designed with power-gating structures to reduce leakage currents in Standby or Sleep mode, and the power switches suffer NBTI or PBTI stress/degradation as well. This paper presents a comprehensive analysis on the impacts of NBTI and PBTI on power-gated SRAM arrays with high-k metal-gate devices. NBTI/PBTI tolerant sense amplifier structures are also discussed.

原文English
主出版物標題2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
頁面377-380
頁數4
DOIs
出版狀態Published - 26 十月 2009
事件2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan
持續時間: 24 五月 200927 五月 2009

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

Conference

Conference2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
國家Taiwan
城市Taipei
期間24/05/0927/05/09

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    Yang, H. I., Chuang, C. T., & Hwang, W. (2009). Impacts of NBTI and PBTI on power-gated SRAM with high-k metal-gate devices. 於 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 (頁 377-380). [5117764] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2009.5117764