Impact of post-deposition-annealing on the electrical characteristics of HfO x N y gate dielectric on Ge substrate

Chao Ching Cheng*, Chao-Hsin Chien, Ching Wei Chen, Shih Lu Hsu, Ming Yi Yang, Chien Chao Huang, Fu Liang Yang, Chun Yen Chang

*Corresponding author for this work

研究成果: Conference article同行評審

14 引文 斯高帕斯(Scopus)

摘要

We systematically investigated the effect of post-deposition-annealing (PDA) on the electrical characteristics of Ge MOS capacitors with hafnium-oxynitride gate dielectric. The higher PDA temperature and longer PDA time was found to obtain the lower equivalent oxide thickness (EOT) of HfO x N y /Ge gate stack, however, with a larger hysteresis width. A lower EOT of 19.5 Å with a low leakage current of 1.8 × 10 -5 A/cm 2 at V G = -1V was achieved after 600 °C annealing for 5 min. The improved capacitor properties after the PDA may be closely related to the different compositions and thicknesses of the resultant interfacial layers.

原文English
頁(從 - 到)30-33
頁數4
期刊Microelectronic Engineering
80
發行號SUPPL.
DOIs
出版狀態Published - 17 六月 2005
事件14th Biennial Conference on Insulating Films on Semiconductors -
持續時間: 22 六月 200524 六月 2005

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