Impact of Nanoscale Polarization Relaxation on Endurance Reliability of One-Transistor Hybrid Memory Using Combined Storage Mechanisms

Yu Chien Chiu; Chun-Yen Chang; Hsiao-Hsuan Hsu; Chun-Hu Cheng; Min Hung Lee

Impact of Nanoscale Polarization Relaxation on Endurance Reliability of One-Transistor Hybrid Memory Using Combined Storage Mechanisms

Yu Chien Chiu, Chun-Yen Chang, Hsiao-Hsuan Hsu, Chun-Hu Cheng, Min Hung Lee

國際半導體產業學院

研究成果: Conference contribution › 同行評審

1 引文斯高帕斯（Scopus）

摘要

We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 10(12)-cycling endurance at 85 degrees C. Such excellent endurance reliability at 85 degrees C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.

原文	English
主出版物標題	IEEE International Reliability Physics Symposium (IRPS)
出版狀態	Published - 2015

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title = "Impact of Nanoscale Polarization Relaxation on Endurance Reliability of One-Transistor Hybrid Memory Using Combined Storage Mechanisms",

abstract = "We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 10(12)-cycling endurance at 85 degrees C. Such excellent endurance reliability at 85 degrees C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.",

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author = "Chiu, {Yu Chien} and Chun-Yen Chang and Hsiao-Hsuan Hsu and Chun-Hu Cheng and Lee, {Min Hung}",

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AU - Chiu, Yu Chien

AU - Chang, Chun-Yen

AU - Hsu, Hsiao-Hsuan

AU - Cheng, Chun-Hu

AU - Lee, Min Hung

PY - 2015

Y1 - 2015

N2 - We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 10(12)-cycling endurance at 85 degrees C. Such excellent endurance reliability at 85 degrees C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.

AB - We demonstrate a novel hybrid nonvolatile memory integrated with a charge trapping mechanism and a ferroelectric polarization effect. The hybrid memory features a large threshold voltage window of 2V, fast 20-ns program/erase time, tight switching margin, and long 10(12)-cycling endurance at 85 degrees C. Such excellent endurance reliability at 85 degrees C can be ascribed to the introduction of charge-trapping node into the design of memory structure that not only weakens temperature-dependent polarization relaxation, but also improves high-temperature endurance reliability.

KW - nonvolatile memory; ferroelectric polarization; charge trapping; endurance; retention

M3 - Conference contribution

SN - 978-1-4673-7362-3

BT - IEEE International Reliability Physics Symposium (IRPS)

ER -