Highly linear 100 MHz CMOS programmable gain amplifiers

Cheng Chung Hsu, Jieh-Tsorng Wu

研究成果: Conference contribution

摘要

Digitally programmable gain amplifiers (PGAs) are designed by using the current-mode technique to achieve constant bandwidth and high linearity. A new current amplifier and MOS switch arrays are proposed to realize the PGAs. Simulation results show that, implemented in a standard 0.35 μm CMOS technology, the amplifier exhibits a total harmonic distortion of lower than -60 dB for an 80 MHz differential output with 1.6 V peak-to-peak voltage. Dissipating 22 mW from a 3.3 V supply, a single-stage PGA can have a voltage gain varying from 0 dB to 20 dB while maintaining a constant bandwidth of 100 MHz driving 2 pF capacitive loads.

原文English
主出版物標題ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
頁面647-650
頁數4
DOIs
出版狀態Published - 1 十二月 2001
事件2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
持續時間: 6 五月 20019 五月 2001

出版系列

名字ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
1

Conference

Conference2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
國家Australia
城市Sydney, NSW
期間6/05/019/05/01

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