High Speed Negative Capacitance Ferroelectric Memory

Chun-Yen Chang, Chia Chi Fan, Chien Liu, Yu Chien Chiu, Chun-Hu Cheng

研究成果: Conference contribution同行評審

摘要

This work experimentally demonstrated a one-transistor ferroelectric versatile memory with the multi-technique integration of negative-capacitance mechanism, ferroelectric polarization effect and metal-strained engineering. The negative-capacitance versatile memory featured a steep sub-60mV/dec subthreshold swing, fast 20-ns switching speed and long 1012 cycled endurance. We successfully demonstrated that the metal-gate-induced strain could help to improve ferroelectric phase transformation. The excellent endurance characteristics could be ascribed to efficient ferroelectric negative-capacitance switching under low program/erase voltages.
原文English
主出版物標題12th IEEE International Conference on ASIC (ASICON)
DOIs
出版狀態Published - 2017

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