High-speed divide-by-4/5 prescalers with merged and gates using GaInP/GaAs HBT and SiGe HBT technologies

Hung Ju Wei*, Chin-Chun Meng, Yu Wen Chang, Yi Chen Lin, Quo Wei Huang

*Corresponding author for this work

研究成果: Article同行評審

摘要

This paper demonstrates the divide-by-4/5 prescalers with merged AND gates in 2-μm GaInP/GaAs heterojunction bipolar transistor (HBT) and 0.35-μm SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (fT), the maximum operating frequency of a D-type flip-flop can be promoted. At the supply voltage of 5V, the GaInP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1-8 GHz at the cost of power consumption.

原文English
頁(從 - 到)1498-1500
頁數3
期刊Microwave and Optical Technology Letters
50
發行號6
DOIs
出版狀態Published - 1 六月 2008

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