High-performance poly-Si TFTs fabricated by implant-to-silicide technique

Chia Pin Lin*, Yi Hsuan Xiao, Bing-Yue Tsui

*Corresponding author for this work

研究成果: Article同行評審

17 引文 斯高帕斯(Scopus)

摘要

High-performance poly-Si thin-film transistors (TFTs) with fully silicided source/drain (FSD) and ultrashort shallow extension (SDE) fabricated by implant-to-silicide (ITS) technique are proposed for the first time. Using the FSD structure, the S/D parasitic resistance can be suppressed effectively. Using the ITS technique, an ultrashort and defect-free SDE can also be formed quickly at about 600 °C. Therefore, the FSD poly-Si TFTs exhibits better current-voltage characteristics than those of conventional TFTs. It should be noted that the on/off current ratios of FSD poly-Si TFT (W/L = 1/4/μm) is over 3.3 × 107, and the field-effective mobility of that device is about 141.6 (cm2/ Vs). Moreover, the superior short-channel characteristics of FSD poly-Si TFTs are also observed. It is therefore believed that the proposed FSD poly-Si TFT is a very promising TFT device.

原文English
頁(從 - 到)185-187
頁數3
期刊IEEE Electron Device Letters
26
發行號3
DOIs
出版狀態Published - 1 三月 2005

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