High-performance PMOS devices on (110)/〈111'〉 substrate/channel with multiple stressors

Howard C.H. Wang, Shih Hian Huang, Ching Wei Tsai, Hsien Hsin Lin, Tze Liang Lee, Shih Chang Chen, Carlos H. Diaz, Mong Song Liang, Jack Y.C. Sun

研究成果: Conference contribution

5 引文 斯高帕斯(Scopus)

摘要

A study was performed to investigate the effect of multiple stressors on CMOS devices on (110) and (100) substrates with different channel directions. For the first time, 87% Ion-Ioff improvement is achieved by utilizing SiGe-S/D and compressive contact etch stop layer (c-CESL) for PMOS devices on (110) substrate with 〈111〉 channel direction. The improvement is similar to that on conventional (100) substrate with 〈110〉 channel direction and can be explained by piezoresistive coefficients. Record PMOS device performance of Ion=900μA/μm at Ioff =100nA/um and VDD=1.0V for 40nm gate length is demonstrated.

原文English
主出版物標題2006 International Electron Devices Meeting Technical Digest, IEDM
DOIs
出版狀態Published - 2006
事件2006 International Electron Devices Meeting, IEDM - San Francisco, CA, United States
持續時間: 10 十二月 200613 十二月 2006

出版系列

名字Technical Digest - International Electron Devices Meeting, IEDM
ISSN(列印)0163-1918

Conference

Conference2006 International Electron Devices Meeting, IEDM
國家United States
城市San Francisco, CA
期間10/12/0613/12/06

指紋 深入研究「High-performance PMOS devices on (110)/〈111'〉 substrate/channel with multiple stressors」主題。共同形成了獨特的指紋。

  • 引用此

    Wang, H. C. H., Huang, S. H., Tsai, C. W., Lin, H. H., Lee, T. L., Chen, S. C., Diaz, C. H., Liang, M. S., & Sun, J. Y. C. (2006). High-performance PMOS devices on (110)/〈111'〉 substrate/channel with multiple stressors. 於 2006 International Electron Devices Meeting Technical Digest, IEDM [4154395] (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2006.346960