High-performance GaN MOSFET with high-κ LaAlO 3/SiO 2 gate dielectric

Chung-Yong Tsai*, T. L. Wu, Albert Chin

*Corresponding author for this work

研究成果: Article同行評審

75 引文 斯高帕斯(Scopus)

摘要

Using a high-κ LaAlO 3/SiO 2 gate dielectric, the recessed-gate GaN MOSFET has a low threshold voltage (V t) of 0.1 V, low on-resistance (R on) of 13.5 Ω mm, high breakdown voltage of 385 V, high transconductance (g m) of 136 mS/mm, and record-best normalized drive current (μ C ox) of 172 μA/V 2. Such excellent device integrity is due to the small capacitance equivalent thickness of 3.0 nm, using a high-κ gate dielectric and recessed-gate etching.

原文English
文章編號6087370
頁(從 - 到)35-37
頁數3
期刊IEEE Electron Device Letters
33
發行號1
DOIs
出版狀態Published - 1 一月 2012

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