High performance charge-trapping flash memory with highly-scaled trapping layer

Albert Chin*, Chung-Yong Tsai, Hong Wang

*Corresponding author for this work

研究成果: Paper同行評審

1 引文 斯高帕斯(Scopus)

摘要

We report a novel charge-trapping (CT) flash memory device with highly scaled equivalent-Si 3N 4-thickness (ENT) trapping layer <4 nm. This device shows a large 10-year extrapolated retention window of 3.1 V at 125°C and excellent endurance of 10 6 cycles, under the fast 100 μs and low ±16 V program/erase. These excellent memory device performances and ultra-thin ENT trapping thickness are the enable technology to continuously downscale the flash memory.

原文English
頁面32-35
頁數4
DOIs
出版狀態Published - 1 十二月 2011
事件2011 11th Annual Non-Volatile Memory Technology Symposium, NVMTS 2011 - Shanghai, China
持續時間: 7 十一月 20119 十一月 2011

Conference

Conference2011 11th Annual Non-Volatile Memory Technology Symposium, NVMTS 2011
國家China
城市Shanghai
期間7/11/119/11/11

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