Film-Profile Engineered InGaZnO Thin-Film Transistors with Self-Aligned Bottom Gates

Bo Shiuan Shie, Horng-Chih Lin, Tiao Yuan Huang

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

We propose and demonstrate a method which combines film profile engineering (FPE) and a procedure of forming self-aligned bottom gates (SABGs) to fabricate InGaZnO thin-film transistors (TFTs). In the scheme, an ingenious etching procedure was implemented to form the final bottom gate self-aligned to the upper hardmask structure. The fabricated SABG devices show greatly reduced OFF-state leakage as compared with nonself-aligned ones, attributing to the reduction of gate-to-source/drain overlap areas which lowers both parasitic capacitance and gate leakage current. These merits benefit the operation of circuits consisted of TFTs implemented with FPE.

原文English
文章編號7119561
頁(從 - 到)787-789
頁數3
期刊IEEE Electron Device Letters
36
發行號8
DOIs
出版狀態Published - 1 八月 2015

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