Evaluation on efficient measurement setup for transient-induced latchup with BI-polar trigger

Ming-Dou Ker*, Sheng Fu Hsu

*Corresponding author for this work

研究成果: Conference contribution同行評審

12 引文 斯高帕斯(Scopus)

摘要

An efficient measurement setup for transient-induced latchup (TLU) with bi-polar trigger is evaluated in this paper. The influences of the current-blocking diode and the current-limiting resistance on TLU immunity are investigated with the silicon controlled rectifier (SCR) fabricated in a 0.25-μm CMOS technology. The measurement setup without a current-blocking diode but with a small current-limiting resistance is recommended to evaluate TLU immunity of CMOS ICs. This recommended measurement setup not only can accurately judge the TLU level of CMOS ICs without over estimation, but also is beneficial to avoid electrical over-stress (EOS) damage on device under test (DUT). To further prove the utility of this recommended TLU measurement in the real circuits, a ring oscillator fabricated by 0.25-μm CMOS technology is used as the test circuit for verification.

原文English
主出版物標題2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual
頁面121-128
頁數8
DOIs
出版狀態Published - 15 十二月 2005
事件2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual - San Jose, CA, United States
持續時間: 17 四月 200521 四月 2005

出版系列

名字IEEE International Reliability Physics Symposium Proceedings
ISSN(列印)1541-7026

Conference

Conference2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual
國家United States
城市San Jose, CA
期間17/04/0521/04/05

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