Evaluation of stability, performance of ultra-low voltage MOSFET, TFET, and Mixed TFET-MOSFET SRAM cell with write-assist circuits

Yin Nien Chen, Ming Long Fan, Vita Pi Ho Hu, Pin Su, Ching Te Chuang

研究成果: Article同行評審

34 引文 斯高帕斯(Scopus)

摘要

In this work, we propose a mixed TFET-MOSFET 8T SRAM cell comprising MOSFET cross-coupled inverters, dedicated TFET read stack and TFET write access transistors for ultra-low voltage operation. Exploiting both the merits of TFET and MOSFET devices, the proposed SRAM cell provides significant improvement in SRAM stability, Vmin and performance. The stability and performance of the proposed cell are evaluated and compared with the conventional MOSFET 8T cell and pure TFET 8T cell using mixed-mode TCAD simulations based on published design rules for 22 nm technology node. Besides, the impacts of the device design of the proposed SRAM cell on the stability are also investigated. Various write-assist techniques to enhance the write-ability across VDD= 0.2 to 0.7 V for these SRAM cells are comparatively assessed. The results indicate that the proposed mixed TFET-MOSFET cell topology is viable for ultra-low voltage operation while MOSFET cell provides better stability and performance for high voltage operation.

原文English
文章編號6933953
頁(從 - 到)389-399
頁數11
期刊IEEE Journal on Emerging and Selected Topics in Circuits and Systems
4
發行號4
DOIs
出版狀態Published - 1 十二月 2014

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