ESD protection design for mixed-voltage I/O buffer by using stacked-NMOS triggered SCR device

Ming-Dou Ker, Chien Hui Chuang, Hsin Chin Jiang

研究成果: Conference contribution同行評審

5 引文 斯高帕斯(Scopus)

摘要

A new ESD protection circuit, by using the stacked-NMOS triggered silicon controlled rectifier (SNTSCR) as the ESD clamp device, is designed to protect the mixed-voltage I/O buffers of CMOS IC's. Without using the thick gate oxide, the experimental results in a 0.35 -μm CMOS process have proven that the human-body-model ESD level of the mixed-voltage I/O buffer can be successfully increased from the original ∼2kV to become 蠑8kV by using this new proposed ESD protection circuit.

原文English
主出版物標題Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001
發行者ESD Association
頁面32-43
頁數12
ISBN(電子)1585370398
出版狀態Published - 1 一月 2001
事件Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001 - Portland, United States
持續時間: 11 九月 200113 九月 2001

出版系列

名字Electrical Overstress/Electrostatic Discharge Symposium Proceedings
2001-January
ISSN(列印)0739-5159

Conference

ConferenceElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001
國家United States
城市Portland
期間11/09/0113/09/01

指紋 深入研究「ESD protection design for mixed-voltage I/O buffer by using stacked-NMOS triggered SCR device」主題。共同形成了獨特的指紋。

引用此