We have investigated the effects that various pre-deposition surface treatments, such as HF dipping (HF-dipped), NH 3 surface nitridation (NH 3 -annealed), and rapid thermal oxidation (RTO-treated), have on the electrical properties of HfO 2 gate dielectrics. The NH 3 -annealed technique is superior to the others because the dielectric subject to NH 3 surface nitridation possesses a tremendously reduced leakage current, the lowest equivalent oxide thickness (EOT), and a moderate hysteresis width. In contrast, the RTO-treated preparation can only effectively reduce the leakage current by its resultant increased physical thickness and displays considerably severe hysteresis. We have also studied the dependence of hysteresis on the initial inversion bias (V inv ), temperature, and frequency for all splits. The hysteresis width increases upon increasing the initial inversion bias and decreasing the temperature, but it is rather insensitive to the measuring frequency. In addition, our experimental results indicate that the hysteresis width depends exponentially on both the initial inversion bias and the temperature, and it can be described well by a general empirical relationship that has the form C(T) · exp(R v V inv ). Finally, the conduction currents through the dielectrics are probably dominated by trap-assisted tunneling (TAT) because the current densities display stronger temperature dependence at low voltage than they do at higher voltages. Based on the trap-assisted tunneling model, the corresponding parameters have been extracted and are presented.
|頁（從 - 到）||87-93|
|期刊||Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers|
|出版狀態||Published - 1 一月 2005|