Efficient vector compaction methods for power estimation with consecutive sampling techniques

Chih Yang Hsu*, Chien-Nan Liu, Jing Yang Jou

*Corresponding author for this work

研究成果: Article同行評審

摘要

For large circuits, vector compaction techniques could provide a faster solution for power estimation with reasonable accuracy. Because traditional sampling approach will incur useless transitions between every sampled pattern pairs after they are concatenated into a single sequence for simulation, we proposed a vector compaction method with grouping and single-sequence consecutive sampling technique to solve this problem. However, it is very possible that we cannot find a perfect consecutive sequence without any undesired transitions. In such cases, the compaction ratio of the sequence length may not be improved too much. In this paper, we propose an efficient approach to relax the limitation a little bit such that multiple consecutive sequences are allowed. We also propose an algorithm to reduce the number of sequences instead of setting the number as one to find better solutions for vector compaction problem. As demonstrated in the experimental results, the average compaction ratio and speedup can be significantly improved by using this new approach.

原文English
頁(從 - 到)2973-2982
頁數10
期刊IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E87-A
發行號11
出版狀態Published - 1 一月 2004

指紋 深入研究「Efficient vector compaction methods for power estimation with consecutive sampling techniques」主題。共同形成了獨特的指紋。

引用此