Effects of CoSi2 on p+ polysilicon gates fabricated by BF2 + implantation into CoSi/amorphous Si bilayers

Huang-Chung Cheng*, Wen Koi Lai, Han Wen Liu, Miin Horng Juang

*Corresponding author for this work

研究成果: Article同行評審

摘要

The integrity of thin gate oxide structures fabricated by implanting BF2 + ions into bilayered CoSi/amorphous silicon films and subsequent annealing has been studied as a function of cobalt suicide thickness and implantation energy. Significant degradation of gate oxide integrity and flatband voltage shifts were found with increasing cobalt silicide thickness and annealing temperature. It is shown that although thinner cobalt silicide can result in excellent gate dielectric integrity it also leads to worse thermal stability at a high annealing temperature. Moreover, shallower implantation depth and lower annealing temperature can reduce the boron penetration, but depletion effects in polycrystalline silicon gates are caused accordingly. Hence, appropriate process conditions, involving trade-offs among CoSi2 thickness, implantation energy and annealing temperature, must be used to optimize the device performance while retaining the thin dielectric reliability.

原文English
頁(從 - 到)3590-3602
頁數13
期刊Journal of the Electrochemical Society
145
發行號10
DOIs
出版狀態Published - 1 一月 1998

指紋 深入研究「Effects of CoSi<sub>2</sub> on p<sup>+</sup> polysilicon gates fabricated by BF<sub>2</sub> <sup>+</sup> implantation into CoSi/amorphous Si bilayers」主題。共同形成了獨特的指紋。

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