Dynamic Threshold Voltage MOSFET (DTMOS) for ultra-low voltage operation

Fariborz Assaderaghi*, Dennis Sinitsky, Stephen Parke, Jeffrey Bokor, Ping K. Ko, Chen-Ming Hu

*Corresponding author for this work

研究成果: Conference article同行評審

162 引文 斯高帕斯(Scopus)


To extend the lower bound of power supply to ultra-low voltages (0.6 V and below), we propose a Dynamic-Threshold Voltage MOSFET (DTMOS) built on Silicon-On-Insulator (SOI). The threshold voltage of DTMOS drops as the gate voltage is raised, resulting in a much higher current drive than standard MOSFET at low power supply voltages. On the other hand, Vt is high at Vgs = 0, therefore the leakage current is low. We provide experimental results and 2-D device and mixed-mode simulations to analyze DTMOS and compare its performance with a standard MOSFET. These results verify excellent DC inverter characteristics down to Vdd = 0.2 V, and good ring oscillator performance down to 0.3 V for DTMOS.

頁(從 - 到)809-812
期刊Technical Digest - International Electron Devices Meeting
出版狀態Published - 1 十二月 1994
事件Proceedings of the 1994 IEEE International Electron Devices Meeting - San Francisco, CA, USA
持續時間: 11 十二月 199414 十二月 1994

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