To extend the lower bound of power supply to ultra-low voltages (0.6 V and below), we propose a Dynamic-Threshold Voltage MOSFET (DTMOS) built on Silicon-On-Insulator (SOI). The threshold voltage of DTMOS drops as the gate voltage is raised, resulting in a much higher current drive than standard MOSFET at low power supply voltages. On the other hand, Vt is high at Vgs = 0, therefore the leakage current is low. We provide experimental results and 2-D device and mixed-mode simulations to analyze DTMOS and compare its performance with a standard MOSFET. These results verify excellent DC inverter characteristics down to Vdd = 0.2 V, and good ring oscillator performance down to 0.3 V for DTMOS.
|頁（從 - 到）||809-812|
|期刊||Technical Digest - International Electron Devices Meeting|
|出版狀態||Published - 1 十二月 1994|
|事件||Proceedings of the 1994 IEEE International Electron Devices Meeting - San Francisco, CA, USA|
持續時間: 11 十二月 1994 → 14 十二月 1994