Design of VLSI implemented signal processing systems based on signal flow graph analyses

Kuei-Ann Wen*, Jau Yien Lee, Jhing Fa Wang, Chang Soon Wu

*Corresponding author for this work

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

An efficient design approach based on signal flow graph (SFG) analyses is introduced. A common set of VLSI structures has been derived for homogeneous and shuffle-exchange SFGs and are shown to be applicable to a general set of signal processing algorithms. The feasibility of this SFG-oriented design approach is demonstrated by an efficient implementation of the convolutional encoder/decoder, which is a significant achievement for coding system design.

原文English
主出版物標題Proceedings - IEEE International Symposium on Circuits and Systems
發行者Publ by IEEE
頁面1947-1951
頁數5
ISBN(列印)9517212402
DOIs
出版狀態Published - 1 十二月 1988

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2
ISSN(列印)0271-4310

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