Design of high-performance and highly reliable nMOSFETs with embedded Si:C S/D extension stressor(Si:C S/D-E)

Steve S. Chung, E. R. Hsieh, P. W. Liu, W. T. Chiang, S. H. Tsai, T. L. Tsai, R. M. Huang, C. H. Tsai, W. Y. Teng, C. I. Li, T. F. Kuo, Y. R. Wang, C. L. Yang, C. T. Tsai, G. H. Ma, S. C. Chien, S. W. Sun

研究成果: Conference contribution同行評審

6 引文 斯高帕斯(Scopus)

摘要

A Novel strained nMOSFET with embedded Si:C in S/D extension stressor (Si:C S/D-E) was presented. Comparing to the bulk device, it revealed good drive current I ON (+27%), high I D,sat current (+67%), enhanced channel mobility (+105%), at a lower effective substitutional carbon concentration (C%=1.1%), using the poly-gate 40nm-node Si:C/eSiGe S/D CMOS technology. Moreover, PBTI effect was first observed in this device as a result of Carbn impurity out-diffusion, which is of critically important for the design trade-off between performance and reliability.

原文English
主出版物標題2009 Symposium on VLSI Technology, VLSIT 2009
頁面158-159
頁數2
出版狀態Published - 16 十一月 2009
事件2009 Symposium on VLSI Technology, VLSIT 2009 - Kyoto, Japan
持續時間: 16 六月 200918 六月 2009

出版系列

名字Digest of Technical Papers - Symposium on VLSI Technology
ISSN(列印)0743-1562

Conference

Conference2009 Symposium on VLSI Technology, VLSIT 2009
國家Japan
城市Kyoto
期間16/06/0918/06/09

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