RF/High-Speed I/O ESD Protection: Co-optimizing Strategy Between BEOL Capacitance and HBM Immunity in Advanced CMOS Process

Wei Min Wu, Ming-Dou Ker*, Shih Hung Chen, Jie Ting Chen, Dimitri Linten, Guido Groeseneken

*Corresponding author for this work

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

In order to meet the requirement of ultrahigh-speed, low latency, and wide bandwidth (BW) in the next 5G mobile network and internet of things (IoT) applications, the parasitic capacitance specification of electrostatic discharge (ESD) protection devices should become much stricter. Reducing the capacitance always degrades the ESD performance in terms of shrinking the size of the ESD protection device. The distributed ESD protection network is one of the solutions which mitigates the capacitance issue and provides a broadband design. However, while the ESD devices are put under the I/O pad in the distributed ESD protection network, back-end-of-line (BEOL) capacitance starts to play an important role in the advanced 28-nm CMOS process. Therefore, a tapered metal structure is proposed to significantly reduce 30% BEOL capacitance of the ESD device, which can gain a 2.8-GHz increase in the operational BW in the distributed network. Meanwhile, it can enhance the human-body-model (HBM) level up to 16% higher than the original layout style under the same front-end-of-line (FEOL) layout size.
原文English
文章編號19709800
頁(從 - 到)2752-2759
頁數8
期刊IEEE Transactions on Electron Devices
67
發行號7
DOIs
出版狀態Published - 七月 2020

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