Design of CMOS cellular neural network (CNN) using the neuron-bipolar junction transistor (νBJT)

Chiou Ling Yeh*, Chung Yu Wu

*Corresponding author for this work

研究成果: Paper同行評審

摘要

In this paper, two CMOS implementations of the cellular neural network (CNN) are presented based on the neuron-bipolar junction transistor (vBJT) which consists of the parasitic PNP bipolar junction transistor and the spreading base resistor array in the CMOS process. In the first design, the vBJT is used to implement the neuron and weights of the cell. In the second design, it is used to implement the current summation and weights of the cell, and a diode structure is proposed to realize the neuron. For programmable capability, the resistor in the vBJT can be replaced by a tunable MOS resistor. The two kinds of circuits have been designed and fabricated in 0.6 μm single-poly-triple-metal n-well CMOS process.

原文English
頁面2337-2342
頁數6
DOIs
出版狀態Published - 1999
事件International Joint Conference on Neural Networks (IJCNN'99) - Washington, DC, USA
持續時間: 10 七月 199916 七月 1999

Conference

ConferenceInternational Joint Conference on Neural Networks (IJCNN'99)
城市Washington, DC, USA
期間10/07/9916/07/99

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