In this paper, two CMOS implementations of the cellular neural network (CNN) are presented based on the neuron-bipolar junction transistor (vBJT) which consists of the parasitic PNP bipolar junction transistor and the spreading base resistor array in the CMOS process. In the first design, the vBJT is used to implement the neuron and weights of the cell. In the second design, it is used to implement the current summation and weights of the cell, and a diode structure is proposed to realize the neuron. For programmable capability, the resistor in the vBJT can be replaced by a tunable MOS resistor. The two kinds of circuits have been designed and fabricated in 0.6 μm single-poly-triple-metal n-well CMOS process.
|出版狀態||Published - 1999|
|事件||International Joint Conference on Neural Networks (IJCNN'99) - Washington, DC, USA|
持續時間: 10 七月 1999 → 16 七月 1999
|Conference||International Joint Conference on Neural Networks (IJCNN'99)|
|城市||Washington, DC, USA|
|期間||10/07/99 → 16/07/99|