This paper proposes the wideband active power splitter design where the gain cells are arranged in interleaf rather than the conventional parallel style. By reducing the shunt capacitance of the input transmission line, thus extending its bandwidth, the circuit's high-frequency performance can be greatly improved. A DC-40GHz interleaf active power splitter is then designed using 90nm-CMOS process. With 5dB gain, the magnitude and phase imbalance between the two output ports are 0.15dB and 2.6o at 20GHz, and 0.16dB and 14o at 40GHz. The output-port isolation S23 is mostly below -30dB.