Crossroad system-on-chip communication architecture for low power embedded systems

Kuei Chung Chang*, Jih Shen Shen, Tien-Fu Chen

*Corresponding author for this work

研究成果: Conference contribution同行評審

摘要

As the number of modules on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The disadvantages of shared-bus architectures are larger load per data-bus line, longer delay for data transfer, large energy consumption, and lower bandwidth. This paper proposes a novel interconnect architecture, which dynamically construct a dedicated communication path between any two modules by crossroad switches. In the case of data being transferred between two modules, the energy consumption is significantly reduced because there are no switching activities in other bus segments. Switches can also construct two parallel communication paths at the same time to enhance the communication performance. Experimental results showed that the crossroad bus architecture could save the energy consumption approximated to 31%.

原文English
主出版物標題Proceedings of the 2005 International Conference on Embedded Systems and Applications, ESA'05
頁面151-157
頁數7
出版狀態Published - 1 十二月 2005
事件2005 International Conference on Embedded Systems and Applications, ESA'05 - Las Vegas, NV, United States
持續時間: 27 六月 200530 六月 2005

出版系列

名字Proceedings of the 2005 International Conference on Embedded Systems and Applications, ESA'05

Conference

Conference2005 International Conference on Embedded Systems and Applications, ESA'05
國家United States
城市Las Vegas, NV
期間27/06/0530/06/05

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