Circuit-Simulation-Based Multi-Objective Evolutionary Algorithm for Design Optimization of a-Si:H TFTs Gate Driver Circuits under Multilevel Clock Driving

Sheng Chin Hung, Chien Hsueh Chiang, Yi-ming Li

研究成果: Article同行評審

4 引文 斯高帕斯(Scopus)

摘要

This work optimizes dynamic characteristic of a new amorphous silicon gate (ASG) driver circuit using multi-objective evolutionary algorithm (MOEA) and hydrogenated amorphous silicon (a-Si:H) TFT circuit simulator running on the platform of unified optimization framework (UOF). The ASG driver circuit consisting of 17 a-Si:H TFTs is optimized for the given specifications of the fall time {<} 3 \mu s and the ripple voltage {<} -9 V while simultaneously minimizing the total layout area. More than 50% reductions on the fall time of the ASG driver circuit have been achieved by using the optimization methodology together with a novel three-level clock driving technique. The measured results of the fabricated sample using the optimized parameters confirm the practicability of reported MOEA methodology.

原文English
文章編號7006637
頁(從 - 到)640-645
頁數6
期刊IEEE/OSA Journal of Display Technology
11
發行號8
DOIs
出版狀態Published - 1 八月 2015

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