In this work, applicability of established semiclassical (SC) simulation techniques to ultra-short gate MOS devices is discussed and comparisons between experimental data of MOS transistors with gate down to 40 nm and simulation results are reported. Finally, examples of applications to the comparison of different device structures are reported.
|頁（從 - 到）||347-350|
|期刊||Technical Digest - International Electron Devices Meeting|
|出版狀態||Published - 1994|
|事件||Proceedings of the 1994 IEEE International Electron Devices Meeting - San Francisco, CA, USA|
持續時間: 11 十二月 1994 → 14 十二月 1994