Analysis and simulation of the postbreakdown I-V characteristics of n-MOS transistors in the linear response regime

Enrique A. Miranda, Takamasa Kawanago, Kuniyuki Kakushima, Jordi Suñé, Hiroshi Iwai

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

A simple yet accurate model for the postbreakdown output characteristics of advanced n-MOS transistors with metal gate (W) and high-κ(La 2O3, equivalent oxide thickness = 0.6 nm) gate insulator is reported. The model specifically deals with the so-called linear response regime in which the transistor action is no longer operative after the failure event. By analyzing three particular cases of interest, it is shown that the proposed model is able to account for the conduction characteristics corresponding to failure sites located both at the center of the channel region and close to the source and drain contacts. A compact model for the bulk-drain current is included in order to simulate the departure from linearity occurring at the negative drain bias.

原文English
文章編號6513237
頁(從 - 到)798-800
頁數3
期刊IEEE Electron Device Letters
34
發行號6
DOIs
出版狀態Published - 2013

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