Analysis and modeling of inner fringing field effect on negative capacitance FinFETs

Yen Kai Lin*, Harshit Agarwal, Pragya Kushwaha, Ming Yen Kao, Yu Hung Liao, Korok Chatterjee, Sayeef Salahuddin, Chen-Ming Hu

*Corresponding author for this work

研究成果: Article同行評審

12 引文 斯高帕斯(Scopus)

摘要

We investigate the impact of inner fringing fields on the negative capacitance FinFET (NC-FinFET) and how this scales with the technology node. The 8-/7-nm technology node of the p-type body NC-FinFET is modeled using the Sentaurus technology-aided design (TCAD), which couples Poisson with Landau equations. It is found that the NC effect is beneficial for device scaling. The OFF current is well suppressed in short-channel devices (64.4% reduction at LG = 16 nm) because the inner fringing field induces negative gate charges and decreases the channel potential. For longer channel devices, the influence of inner fringing field disappears, and the depletion charges dominate the subthreshold characteristics. As reducing remnant polarization, the ON current is boosted (11.4% improvement at LG = 16 nm) for all lengths due to better matching between MOSFET and ferroelectric capacitances. In comparison with FinFET, the drain-induced barrier lowering of NC-FinFET is also well controlled (50% reduction at LG = 16 nm) due to the inner fringing field-induced gate charges, showing the scaling capability of NC-FinFET. Furthermore, a compact model to capture the spatial distribution of the inner fringing field is also proposed based on the Gaussian quadrature method, and it is validated with the TCAD simulated data with multiple gate lengths and remnant polarizations.

原文English
文章編號8660728
頁(從 - 到)2023-2027
頁數5
期刊IEEE Transactions on Electron Devices
66
發行號4
DOIs
出版狀態Published - 1 四月 2019

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